Astranis
Astranis designs, builds, and operates the world’s most advanced high-orbit satellites.
- Open roles
- 153
- New role every
- ~0.6 days
Job facts
- Location
- San Francisco
- Department
- Payload Internships
- Posted
- May 01, 2026
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FPGA Intern (Fall 2026)
at Astranis
Astranis builds advanced satellites for high
orbits, expanding humanity’s reach into the solar system. Today, Astranis
satellites provide dedicated, secure networks to highly-sophisticated
customers across the globe— large enterprises, sovereign governments, and the
US military. With five satellites on orbit and many more set to launch soon,
the company is servicing a backlog of more than $1 billion of commercial
contracts.
Astranis is the preferred satellite communications partner
for buyers with stringent requirements for uptime, data security, network
visibility, and customization. Astranis has raised over $750 million from some
of the world’s best investors, from Andreessen Horowitz to Blackrock and
Fidelity, and employs a team of 450 engineers and entrepreneurs. Astranis
designs, builds, and operates its satellites out of its 153,000 sq. ft.
headquarters in Northern California, USA.
FPGA Intern (Fall 2026)
Role:
- RTL Development for FPGA targeted applications
- Work with multiple FPGAs and toolchains
- Interface FPGAs with a variety of peripherals including high speed data converters, memories, MCUs
- Write software to interface and test RTL in hardware
- Collaborate closely with electrical and software engineers
Requirements:
- US Citizenship or Green Card (This is a legal requirement; no exceptions)
- Currently pursuing a B.S. or M.S. in electrical engineering, computer science, computer engineering, or equivalent
- A passion for hardware development, including working in a fast-paced environment and hands-on design and development
- Experience in designing, implementing, and testing high throughput systems implemented on FPGAs
- Proficiency with Verilog/SystemVerilog for synthesis
- Don't meet them all? Not a problem. Please apply even if you do not meet all these criteria.
Bonus:
- Experience with UVM and advanced SystemVerilog verification
- Experience with Xilinx FPGAs
- Experience with Vivado IDE, TCL
- Familiarity with system level estimates and implications of power, thermal, and real estate
- Experience with high speed data converters (ADCs, DACs, JESD204B)
- Experience with circuit level debugging
- Experience with digital communication theory and implementation, such as LDPC implementations
- Experience with space- based systems
- Experience with modern communication systems (RF, IF/IQ, time/freq domains, modulation)
- Experience in at least 1 domain beyond logic design. This could be DSP/radio design, software, hi-rel design (e.g. fault analysis & recover), etc.